Interrupt Register
RX_INT_ST | Receive interrupt. If this bit is set to 1, it indicates there are messages to be handled in the RX FIFO. |
TX_INT_ST | Transmit interrupt. If this bit is set to 1, it indicates the message transmitting mis- sion is finished and a new transmission is able to execute. |
ERR_WARN_INT_ST | Error warning interrupt. If this bit is set to 1, it indicates the error status signal and the bus-off status signal of Status register have changed (e.g., switched from 0 to 1 or from 1 to 0). |
OVERRUN_INT_ST | Data overrun interrupt. If this bit is set to 1, it indicates a data overrun interrupt is generated in the RX FIFO. |
ERR_PASSIVE_INT_ST | Error passive interrupt. If this bit is set to 1, it indicates the TWAI Controller is switched between error active status and error passive status due to the change of error counters. |
ARB_LOST_INT_ST | Arbitration lost interrupt. If this bit is set to 1, it indicates an arbitration lost interrupt is generated. |
BUS_ERR_INT_ST | Error interrupt. If this bit is set to 1, it indicates an error is detected on the bus. |